A Cryo-BiCMOS Controller for Quantum Computers based on Trapped Beryllium Ions

Authored by

Peter Toth, Paul Shine Eugine, Yerzhan Kudabay, Kaoru Yamashita, Sebastian Halama, Judi Parvizinejad, Marco Bonkowski, Hiroki Ishikuro, Christian Ospelkaus, Vadim Issakov

Abstract

This article presents a cryo-BiCMOS system on chip (SoC) designed for single and two-qubit gate operations for quantum computers (QCs) based on beryllium trapped-ions (TIs). Signal generation from 0.7 to 1.6 GHz is supported, covering all microwave transitions in a 9Be+ QC realization. An integrated 48-kbit waveform memory is implemented for improved two-qubit gate fidelity. The fabricated IC is verified in a 4 K environment with up to 4 qubits, thus enabling quantum processor unit (QPU) cointegration. IC operation up to RT ensures compatibility with future system realizations. Measurements demonstrate qubit state control with an oscillation amplitude of 94% before SPAM correction and Rabi oscillation rate of 172 kHz. Evaluations of long sequences of σx gates indicate control of the quantum state with high quality. Interaction with one computational zone is possible at a total power consumption of 86 mW translating to 21.5 mW/qubit in the presented measurements. Comparison with the state-of-the-art controller reveals drastic power and form-factor reduction at comparable performance, thus paving the way for a scalable TI platform. The chip is fabricated in a 0.13-μm SiGe BiCMOS technology. To the best of our knowledge, this is the first reported from-scratch system design for TI-based QC concluding with a qubit state manipulation demonstration.

Details

Organisation(s)
Institute of Quantum Optics
External Organisation(s)
Technische Universität Braunschweig
International Business Machines Corporation (IBM)
Keio University
Type
Article
Journal
IEEE Journal of Solid-State Circuits
Volume
61
Pages
673-689
No. of pages
17
ISSN
0018-9200
Publication date
02.2026
Publication status
Published
Peer reviewed
Yes
ASJC Scopus subject areas
Electrical and Electronic Engineering
Electronic version(s)
https://doi.org/10.1109/JSSC.2025.3632204 (Access: Open )

Cite

Loading...